Method and system for controlling clock frequency for active power management
US9141165B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2009 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Nov 2, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling the clock frequency of a processor executing software in a plurality of active periods, the method comprising, for each period: supplying to a power management application at least one parameter defining an execution profile for the period having high frequency and low frequency operating intervals; the power management application determining, based on said profile, granted clock frequencies for the high and low frequency operating intervals; the processor supplying to the power management application at the commencement of a period an operating cycle requirement for the period; the power management application determining, for each period, based on the operating cycle requirement, the length of the low frequency interval; and controlling the clock frequency in each interval based on the granted clock frequencies determined by the power management application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.