Packages and methods for packaging

US9142470B2 · kind B2 · utility

Assignee

• Analog Devices, Inc. · US

Inventors

• Jicheng Yang · Newark, US
• Asif Chowdhury · Middleton, US
• Manolo Mena · Quezon, PH
• Jia Gao · Winchester, US
• Richard J. Sullivan · Salem, US
• Thomas M. Goida · Windham, US
• Carlo Tiongson · Cavite, PH
• Dipak Sengupta · Boxborough, US

Key dates

• Filing date: May 9, 2014
• Grant date: Sep 22, 2015
• Expiry date: May 9, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3025
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Packaged integrated devices and methods of forming the same are provided. In one embodiment, a packaged integrated device includes a package substrate, a package lid, and an integrated circuit or microelectromechanical systems (MEMS) device. The package lid is mounted to a first surface of the package substrate using an epoxy, and the package lid and the package substrate define a package interior. The package lid includes an interior coating suited to good adhesion with the epoxy, and an exterior coating suited to RF shielding, where the materials of the interior and exterior coatings are different. In one example, the interior lid coating is nickel whereas the exterior lid coating is tin.