Methods and apparatuses for alternate clock selection
US9153303B2 · kind B2 · utility
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1References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 19, 2013 |
| Grant date | Oct 6, 2015 |
| Priority date | — |
| Expiry date | Dec 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods are disclosed, such as those including an oscillator circuit that generates an alternate clock. A multiplexing circuit can be coupled to the alternate clock and an input clock. The alternate clock has a more accurate duty cycle than the input clock. A clock path can be coupled to an output of the multiplexing circuit. The more accurate alternate clock can be coupled to the clock path during a test mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.