Eric Becker
11Patents
3h-index
10Co-inventors
53Inventor score
Filing activity: Aug 20, 2004 → Feb 22, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8018261B2 | Clock generator and methods using closed loop duty cycle correction | Electricity | 18 | Active |
| US7276947B2 | Delay circuit with reset-based forward path static delay | Electricity | 7 | Active |
| US8324946B2 | Clock generator and methods using closed loop duty cycle correction | Electricity | 5 | Active |
| US8913448B2 | Apparatuses and methods for capturing data in a memory | Physics | 3 | Active |
| US9444469B2 | Locked-loop quiescence apparatus, systems, and methods | Electricity | 2 | Active |
| US9335372B2 | Apparatus and methods for delay line testing | Physics | 1 | Active |
| US8754683B2 | Locked-loop quiescence apparatus, systems, and methods | Electricity | 1 | Active |
| US11742868B1 | Time to digital circuitry with error protection scheme | Electricity | 1 | Active |
| US7126393B2 | Delay circuit with reset-based forward path static delay | Electricity | 1 | Expired |
| US9153303B2 | Methods and apparatuses for alternate clock selection | Electricity | 0 | Active |
| US11915739B2 | On-chip device testing circuit that generates noise on power bus of memory device | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.