Patent · US Active

Apparatus and methods for constructing semiconductor chip packages with silicon space transformer carriers

US9159602B2 · kind B2 · utility

13Cited by
35References
13Claims
0Family size

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Key dates

Filing dateAug 19, 2009
Grant dateOct 13, 2015
Priority date
Expiry dateMar 25, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3025
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Apparatus and methods are provided for high density packaging of semiconductor chips using silicon space transformer chip level package structures, which allow high density chip interconnection and/or integration of multiple chips or chip stacks high I/O interconnection and heterogeneous chip or function integration.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.