Fin field-effect transistor (FinFET) device formed using a single spacer, double hardmask scheme
US9159630B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2014 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Jul 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
Abstract
Approaches for providing a single spacer, double hardmask dual-epi FinFET are disclosed. Specifically, at least one approach for providing the FinFET includes: forming a set of spacers along each sidewall of a plurality of fins of the FinFET device; forming a first ultra-thin hardmask over the plurality of fins; implanting the first ultra-thin hardmask over a first set of fins from the plurality of fins; removing the first ultra-thin hardmask over a second set of fins from the plurality of fins untreated by the implant; forming an epitaxial (epi) layer over the second set of fins; forming a second ultra-thin hardmask over the FinFET device; implanting the second ultra-thin hardmask; removing the second ultra-thin hardmask over the first set of fins; and growing an epi layer over the first set of fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.