Methods for fabricating integrated circuits using improved masks
US9165770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2013 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Sep 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a mask overlying a material to be etched by forming first hard mask segments overlying the material to be etched, forming sacrificial mandrels overlying the material to be etched and around each hard mask segment, forming second hard mask segments overlying the semiconductor substrate and adjacent each sacrificial mandrel, and removing the sacrificial mandrels to form first gaps surrounding each first hard mask segment, wherein each first gap is bounded by a respective first hard mask segment and an adjacent second hard mask segment. The method includes etching the material to be etched through the mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.