Semiconductor process
US9165997B2 · kind B2 · utility
1Cited by
0References
10Claims
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Key dates
| Filing date | Dec 25, 2014 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Dec 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.