Spacer material modification to improve K-value and etch properties
US9171736B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2014 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Mar 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0234
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for performing a spacer etch process is described. The method includes conformally applying a spacer material over a gate structure on a substrate, and performing a spacer etch process sequence to partially remove the spacer material from a capping region of the gate structure and a substrate region on the substrate adjacent a base of the gate structure, while retaining a spacer sidewall positioned along a sidewall of the gate structure. The K-value of high-K spacer materials are reduced to an acceptable range with oxidation using an oxygen plasma treatment. The etch rate of low-K spacer materials are reduced to a target range using a nitrogen plasma treatment. Integration of the spacer etch processing is selected based on impact to the other structures in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.