Angelique Raley
56Patents
9h-index
48Co-inventors
74Inventor score
Filing activity: Dec 23, 2011 → Oct 4, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10354873B2 | Organic mandrel protection process | Electricity | 324 | Active |
| US9786503B2 | Method for increasing pattern density in self-aligned patterning schemes without using hard masks | Electricity | 39 | Active |
| US9673059B2 | Method for increasing pattern density in self-aligned patterning integration schemes | Electricity | 39 | Active |
| US9111746B2 | Method for reducing damage to low-k gate spacer during etching | Electricity | 27 | Active |
| US8906760B2 | Aspect ratio dependent deposition to improve gate spacer profile, fin-loss and hardmask-loss for FinFET scheme | Electricity | 17 | Active |
| US9443731B1 | Material processing to achieve sub-10nm patterning | Electricity | 17 | Active |
| US9171736B2 | Spacer material modification to improve K-value and etch properties | Electricity | 16 | Active |
| US9165765B1 | Method for patterning differing critical dimensions at sub-resolution scales | Electricity | 9 | Active |
| US10727057B2 | Platform and method of operating for integrated end-to-end self-aligned multi-patterning process | Electricity | 9 | Active |
| US8664125B2 | Highly selective spacer etch process with reduced sidewall spacer slimming | Electricity | 8 | Active |
| US10916472B2 | Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same | Emerging Cross-Sectional Technologies | 6 | Active |
| US9748110B2 | Method and system for selective spacer etch for multi-patterning schemes | Electricity | 4 | Active |
| US9257280B2 | Mitigation of asymmetrical profile in self aligned patterning etch | Electricity | 3 | Active |
| US11101173B2 | Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same | Emerging Cross-Sectional Technologies | 3 | Active |
| US11322364B2 | Method of patterning a metal film with improved sidewall roughness | Electricity | 1 | Active |
| US11515203B2 | Selective deposition of conductive cap for fully-aligned-via (FAV) | Electricity | 1 | Active |
| US11915931B2 | Extreme ultraviolet lithography patterning method | Electricity | 1 | Active |
| US10748769B2 | Methods and systems for patterning of low aspect ratio stacks | Electricity | 1 | Active |
| US11164781B2 | ALD (atomic layer deposition) liner for via profile control and related applications | Electricity | 1 | Active |
| US11482454B2 | Methods for forming self-aligned contacts using spin-on silicon carbide | Electricity | 1 | Active |
| US10971372B2 | Gas phase etch with controllable etch selectivity of Si-containing arc or silicon oxynitride to different films or masks | Electricity | 1 | Active |
| US10867854B2 | Double plug method for tone inversion patterning | Electricity | 1 | Active |
| US11658038B2 | Method for dry etching silicon carbide films for resist underlayer applications | Electricity | 0 | Active |
| US11127594B2 | Manufacturing methods for mandrel pull from spacers for multi-color patterning | Electricity | 0 | Active |
| US10580660B2 | Gas phase etching system and method | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.