FinFET formation with late fin reveal

US9171935B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Seong-Dong Kim · Lagrangeville, US
• Myung-Hee Na · Lagrangeville, US
• Jin Z. Wallner · Albany, US
• Thomas A. Wallner · Pleasant Valley, US
• Qintao Zhang · Mount Kisco, US

Key dates

• Filing date: Mar 7, 2014
• Grant date: Oct 27, 2015
• Expiry date: Mar 7, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/017

Abstract

A FinFET semiconductor device fabrication process includes forming a plurality of FinFET fins upon a semiconductor substrate, forming a first dielectric layer upon the semiconductor substrate so that an upper surface of the first dielectric layer is coplanar with upper surfaces of the FinFET fins, forming a plurality of dummy gates upon the FinFET fins and the first dielectric layer orthogonal to the FinFET fins, revealing the FinFET fins by removing first portions of the first dielectric layer from source-drain regions, removing the dummy gates, and subsequent to the removal of the dummy gates, revealing the FinFET fins by removing second portions of the first dielectric layer from channel regions.