Patent · US Active

Combined conductive plug/conductive line memory arrays and methods of forming the same

US9172037B2 · kind B2 · utility

2Cited by
3References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 14, 2014
Grant dateOct 27, 2015
Priority date
Expiry dateApr 14, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N70/8828

Abstract

Memory arrays and methods of forming the same are provided. One example method of forming a memory array can include forming a conductive material in a number of vias and on a substrate structure, the conductive material to serve as a number of conductive lines of the array and coupling the number of conductive lines to the array circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.