Semiconductor device and method of forming a reconfigured stackable wafer level package with vertical interconnect
US9177832B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 2011 |
| Grant date | Nov 3, 2015 |
| Priority date | — |
| Expiry date | Sep 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a carrier with a semiconductor die mounting area. A plurality of conductive posts is formed in a periphery of the semiconductor die mounting area and in the carrier. A first portion of the carrier is removed to expose a first portion of the plurality of conductive posts such that a second portion of the plurality of conductive posts is embedded in a second portion of the carrier. A first semiconductor die is mounted to the semiconductor die mounting area and between the first portion of the plurality of conductive posts. A first encapsulant is deposited around the first semiconductor die and around the first portion of the plurality of conductive posts. A second portion of the carrier is removed to expose the second portion of the plurality of conductive posts. An interconnect structure is formed over the plurality of conductive posts and the first semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.