Semiconductor structure and manufacturing method for the same
US9184096B2 · kind B2 · utility
4Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | Nov 10, 2015 |
| Priority date | — |
| Expiry date | Sep 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
Abstract
A semiconductor structure and a manufacturing method for the same are provided. The method includes following steps. A first gate structure is formed on a substrate in a first region. A protecting layer is formed covering the first gate structure. A second gate structure is formed on the substrate in second region exposed by the protecting layer and adjacent to the first region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.