SOI integrated circuit comprising adjacent cells of different types

US9190334B2 · kind B2 · utility

Assignees

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR
• STMicroelectronics (Crolles 2) SAS · FR

Inventors

• Olivier Thomas · Saint-Martin-d'Hères, FR
• Jerome Mazurier · Cestas, FR
• Nicolas Planes · La Terrasse, FR
• Olivier Weber · Grenoble, FR

Key dates

• Filing date: Sep 7, 2012
• Grant date: Nov 17, 2015
• Expiry date: Jul 20, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/859

Abstract

An integrated circuit on a semiconductor substrate has logic gates comprising FDSOI-type transistors made on said substrate, including at least one first transistor comprising a gate with a first work function, and including a transistor comprising a second work function, a memory including memory cells, each memory cell comprising FDSOI type transistors, including at least one third nMOS transistor with a gate presenting a third work function, the third transistor comprising a buried insulating layer and a ground plane at least one fourth pMOS transistor with a gate presenting said third work function, the fourth transistor comprising a buried insulating layer and a ground plane, the ground planes of the third and fourth transistors being made in a same well separating these ground planes from said substrate.