Processing core with speculative register preprocessing in unused execution unit cycles
US9195463B2 · kind B2 · utility
3Cited by
3References
25Claims
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Key dates
| Filing date | Nov 30, 2011 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Oct 28, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit arrangement speculatively preprocess data stored in a register file during otherwise unused cycles in an execution unit, e.g., to prenormalize denormal floating point values stored in a floating point register file, to decompress compressed values stored in a register file, to decrypt encrypted values stored in a register file, or to otherwise preprocess data that is stored in an unprocessed form in a register file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.