Accelerated compute tessellation by compact topological data structure
US9196079B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2012 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jul 11, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method, and computer program product are provided for tessellation using shaders. New graphics pipeline stages implemented by shaders are introduced, including an inner ring shader, an outer edge shader, and topologic shader, which work together with a domain shader and geometry shader to provide tessellated points and primitives. A hull shader is modified to compute values used by the new shaders to perform tessellation algorithms. This approach provides parallelism and customizability to the presently static tessellation engine implementation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.