Systems and methods involving multi-bank, dual- or multi-pipe SRAMs
US9196324B2 · kind B2 · utility
25Cited by
19References
45Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2014 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Jul 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/229
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed for increasing the performance of static random access memory (SRAM). Various systems herein, for example, may include or involve dual- or multi-pipe, multi-bank SRAMs, such as Quad-B2 SRAMs. In one illustrative implementation, there is provided an SRAM memory device including a memory array comprising a plurality of SRAM banks and pairs of separate and distinct pipes associated with each of the SRAM banks, wherein each pair of pipes may provide independent access to its associated SRAM bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.