Semiconductor device and method for fabricating the same
US9196617B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Sep 24, 2014 |
| Grant date | Nov 24, 2015 |
| Priority date | — |
| Expiry date | Sep 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/213
Abstract
A semiconductor device and a method for fabricating the same are provided to prevent a floating body effect and reduce coupling capacitance between buried bit lines. The semiconductor device comprises a first pillar disposed over a semiconductor substrate and including a vertical channel region, a bit line located in the lower portion of the vertical channel region inside the first pillar and a semiconductor layer extended from the semiconductor substrate to one sidewall of the first pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.