Memory element and memory device with ion source layer and resistance change layer
US9202560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2012 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Nov 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There are provided a memory element and a memory device excellently operating at a low current, and having the satisfactory retention characteristics. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and being in a single- or multi-layer structure including a layer containing a highest percentage of tellurium (Te) as an anionic component, and an ion source layer disposed on the second electrode side, and containing a metallic element and one or more chalcogen elements including tellurium (Te), sulfur (S), and selenium (Se) with aluminum (Al) of 27.7 atomic % or more but 47.4 atomic % or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.