Compensation for temperature dependence of bit line resistance
US9202579B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2013 |
| Grant date | Dec 1, 2015 |
| Priority date | — |
| Expiry date | Oct 9, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for sensing the threshold voltage of a memory cell during reading and verify operations by compensating for changes, including temperature-based changes, in the resistance of a bit line or other control line. A memory cell being sensed is in a block in a memory array and the block is in a group of blocks. A portion of the bit line extends between the group of blocks and a sense component and has a resistance which is based on the length/distance and the temperature. Various parameters can be varied with temperature and the group of blocks to provide the compensation, including bit line voltage, selected word line voltage, source line voltage, sense time and/or sense current or voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.