Repair control logic for safe memories having redundant elements
US9208040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2014 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Aug 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Repair control logic for a safe memory having redundant elements is provided. The repair control logic includes comparison logic including, for each bit slice of a memory array, a comparator circuit configured to determine whether a location value of an associated bit slice of the memory array is greater than a location value of a defective bit slice of the memory array, and data switching logic including, for each bit slice of the memory array, a switching circuit, responsive to a determination that the location value of the associated bit slice is greater than the location value of the defective bit slice, to switch data from the associated bit slice to an adjacent bit slice of the memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.