Testing a decision feedback equalizer (‘DFE’)
US9209948B2 · kind B2 · utility
3Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2015 |
| Grant date | Dec 8, 2015 |
| Priority date | — |
| Expiry date | Jan 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03248
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Testing a Decision Feedback Equalizer (‘DFE’), the DFE including a summing amplifier operatively coupled to a plurality of latches and an input signal line for receiving a data signal, including: preventing a differential data signal from being received by the summing amplifier; and iteratively for each tap to be tested: setting a tap coefficient for each tap to zero; setting an output of the plurality of latches to a predetermined value; setting a tap coefficient for the tap to be tested to a full scale value; and determining whether a resultant output signal from the DFE matches a predetermined expected output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.