Barrier layer for FinFET channels

US9214555B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Richard Kenneth Oxland · Brussels, BE
• Mark van Dal · Linden, BE
• Martin Christopher Holland · Leuven, BE
• Georgios Vellianitis · Heverlee, BE
• Matthias Passlack · Overijse, BE

Key dates

• Filing date: Mar 12, 2013
• Grant date: Dec 15, 2015
• Expiry date: Apr 11, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/024

Abstract

Integrated circuit devices having FinFETs with channel regions low in crystal defects and current-blocking layers underneath the channels to improve electrostatic control. Optionally, an interface control layer formed of a high bandgap semiconductor is provided between the current-blocking layer and the channel. The disclosure also provides methods of forming integrated circuit devices having these structures. The methods include forming a FinFET fin including a channel by epitaxial growth, then oxidizing a portion of the fin to form a current-blocking layer.