Ball grid array configuration for reliable testing
US9217758B2 · kind B2 · utility
5Cited by
6References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2014 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Jan 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2601
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of testing a semiconductor die having an array of contacts, where at least two I/O pads in adjacent positions have the same data signal during testing operations with a test probe. The adjacent I/O pads form a test cluster allowing the use of a larger test probe tip and/or greater tolerance on test probe tip alignment during testing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.