Antiphase domain boundary-free III-V compound semiconductor material on semiconductor substrate and method for manufacturing thereof
US9218964B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 5, 2011 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Nov 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02639
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing a III-V compound semiconductor material, and the semiconductor material thus manufactured, are disclosed. In one embodiment, the method comprises providing a substrate comprising a first semiconductor material having a {001} orientation and an insulating layer overlaying the first semiconductor material. The insulating layer comprises a recessed region exposing an exposed region of the first semiconductor material. The method further comprises forming a buffer layer overlaying the exposed region that comprises a group IV semiconductor material. The method further comprises thermally annealing the substrate and the buffer layer, thereby roughening the buffer layer to create a rounded, double-stepped surface having a step density and a step height. A product of the step density and the step height is greater than or equal to 0.05 on the surface. The method further comprises at least partially filling the recessed region with a III-V compound semiconductor material overlaying the surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.