Substrate having pillar group and semiconductor package having pillar group
US9219048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2014 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Jun 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a substrate and a semiconductor package. The substrate includes a body, at least one pad group, a plurality of traces and at least one pillar group. The pad group includes a plurality of pads. Each pad has at least one inner side and at least one outer side. The inner side of a first pad is faced to the inner side of an adjacent second pad with a spaced section between. Each pillar group includes a plurality of pillars disposed on respective ones of the pads. The use of pad groups having multiple pads on which to form pillars allows an increase in the number of the pillars available in a given area so as to increase the amount of I/O connections. Furthermore, for a given number of I/O connections, the area occupied by the pads, pillars and traces can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.