Semiconductor device having localized charge balance structure and method
US9219138B2 · kind B2 · utility
4Cited by
21References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 12, 2013 |
| Grant date | Dec 22, 2015 |
| Priority date | — |
| Expiry date | Sep 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
Abstract
In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve Eas characteristics. A body region is formed adjacent the low-doped p-type region and a control electrode structure is formed adjacent the body region for controlling a channel region within the body region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.