Patent · US Active

Chip arrangement and a method for manufacturing a chip arrangement

US9224695B2 · kind B2 · utility

0Cited by

1References

23Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Frank Pueschner · Kelheim, DE
Juergen Hoegerl · Regensburg, DE
Roman Hollweck · Friesenried, DE
Peter Scherl · Regensburg, DE

Key dates

Filing date	Feb 28, 2013
Grant date	Dec 29, 2015
Priority date	—
Expiry date	Feb 28, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/15153
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

In various embodiments a chip arrangement is provided, wherein the chip arrangement may include a chip and at least one foil attached to at least one side of the chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.