Method for fabricating semiconductor device
US9230816B1 · kind B1 · utility
6Cited by
9References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2015 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Feb 24, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon and an interlayer dielectric (ILD) layer around the gate structure; forming a dielectric layer on the gate structure and the ILD layer; forming a patterned hard mask on the dielectric layer; forming an opening in the dielectric layer and the ILD layer; performing a silicide process for forming a silicide layer in the opening; removing the patterned hard mask and un-reacted metal after the silicide process; and forming a contact plug in the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.