Methods of fabricating a three-dimensional non-volatile memory device
US9230973B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2014 |
| Grant date | Jan 5, 2016 |
| Priority date | — |
| Expiry date | Apr 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30604
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device, such as a three-dimensional NAND memory string, includes forming a first stack of alternating layers of a first material and a second material different from the first material over a substrate, removing a portion of the first stack to form a first trench, filling the trench with a sacrificial material, forming a second stack of alternating layers of the first material and the second material over the first stack and the sacrificial material, removing a portion of the second stack to the sacrificial material to form a second trench, and removing the sacrificial material to form a continuous trench through the first stack and the second stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.