Memory cells with read access schemes
US9236116B1 · kind B1 · utility
19Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2015 |
| Grant date | Jan 12, 2016 |
| Priority date | — |
| Expiry date | Mar 26, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory cells with read assist schemes and methods of use are provided. The memory includes a plurality of rows and columns, each of which include a memory cell having a pull-down device. The memory further includes at least one boost circuit connected to each of the memory cells and which provides a negative boost signal to the pull-down devices during read access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.