Patent · US Active

Wafer, a method for processing a wafer, and a method for processing a carrier

US9236241B2 · kind B2 · utility

0Cited by
0References
20Claims
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Assignee

Inventors

Key dates

Filing dateMay 5, 2014
Grant dateJan 12, 2016
Priority date
Expiry dateMay 10, 2034

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T428/13
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

According to various embodiments, a method for processing a wafer may include: forming at least one hollow chamber and a support structure within the wafer, the at least one hollow chamber defining a cap region of the carrier located above the at least one hollow chamber and a bottom region of the carrier located below the at least one hollow chamber and an edge region surrounding the cap region of the carrier, wherein a surface area of the cap region is greater than a surface area of the edge region, and wherein the cap region is connected to the bottom region by the support structure; removing the cap region in one piece from the bottom region and the edge region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.