Semiconductor reflow processing for high aspect ratio fill
US9245798B2 · kind B2 · utility
4Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Mar 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1089
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for at least partially filling a feature on a workpiece includes obtaining a workpiece including a feature having a high aspect ratio in the range of about 10 to about 80, depositing a first conformal conductive layer in the feature, and thermally treating the workpiece to reflow the first conformal conductive layer in the feature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.