Electronic component package fabrication method and structure
US9245862B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2013 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Feb 12, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic component structure includes a primary redistribution structure having a primary redistribution structure terminal. A secondary redistribution structure is formed on the primary redistribution structure terminal. A buildup dielectric layer encloses the primary redistribution structure, where a cushion pad of the secondary redistribution structure is supported by the buildup dielectric layer. An interconnection ball is mounted to the secondary redistribution structure. Stress imparted upon the interconnection ball is transferred through the secondary redistribution structure and dissipated to the buildup dielectric layer through the cushion pad. The buildup dielectric layer is readily able to absorb this stress thus minimizing the probability of failure of the secondary redistribution structure including the interconnection ball formed thereon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.