Method for manufacturing semiconductor device
US9245972B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2013 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Jan 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A method for manufacturing a semiconductor device is provided. A substrate having a first gate and a second gate respectively formed in a first region and a second region is provided. An underlayer is formed on the substrate to cover the first gate in the first region and the second gate in the second region. A patterned mask with a predetermined thickness is formed on the underlayer in the first region. The underlayer corresponding to the second gate in the second region is removed by the patterned mask to expose the second gate, wherein the underlayer corresponding to the first gate in the first region is partially consumed to expose part of the first gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.