Mechanisms to bound the presence of cache blocks with specific properties in caches
US9251069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2013 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Jun 28, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for efficiently limiting storage space for data with particular properties in a cache memory. A computing system includes a cache array and a corresponding cache controller. The cache array includes multiple banks, wherein a first bank is powered down. In response a write request to a second bank for data indicated to be stored in the powered down first bank, the cache controller determines a respective bypass condition for the data. If the bypass condition exceeds a threshold, then the cache controller invalidates any copy of the data stored in the second bank. If the bypass condition does not exceed the threshold, then the cache controller stores the data with a clean state in the second bank. The cache controller writes the data in a lower-level memory for both cases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.