Methods for a phase-change memory array
US9251897B2 · kind B2 · utility
4Cited by
2References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2009 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Oct 14, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods of operating phase-change memory arrays are described. A method includes determining a pattern to be written to a phase-change memory array and executing, according to the pattern, two or more proper reset sequences on the phase-change memory array to write the pattern to the phase-change memory array. Another method includes executing a set sequence on a phase-change memory array and performing a proper read of the phase-change memory array to obtain a pattern derived from executing the set sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.