Semiconductor device and method of stacking semiconductor die in mold laser package interconnected by bumps and conductive vias
US9252032B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2012 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | Aug 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer contains a plurality of first semiconductor die. The semiconductor wafer is mounted to a carrier. A channel is formed through the semiconductor wafer to separate the first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. An encapsulant is deposited over the carrier and first semiconductor die and into the channel while a side portion and surface portion of the second semiconductor die remain exposed from the encapsulant. A first conductive via is formed through the encapsulant in the channel. A second conductive via is formed through the encapsulant over a contact pad of the first semiconductor die. A conductive layer is formed over the encapsulant between the first and second conductive vias. An insulating layer is formed over the conductive layer and encapsulant. The carrier is removed. An interconnect structure is formed over the first conductive via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.