Methods of forming memory cells

US9252188B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Sanh D. Tang · Boise, US
• Scott E. Sills · Boise, US
• John K. Zahurak · Eagle, US

Key dates

• Filing date: Nov 17, 2011
• Grant date: Feb 2, 2016
• Expiry date: Sep 13, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/063

Abstract

Some embodiments include methods of forming memory cells. A series of rails is formed to include bottom electrode contact material. Sacrificial material is patterned into a series of lines that cross the series of rails. A pattern of the series of lines is transferred into the bottom electrode contact material. At least a portion of the sacrificial material is subsequently replaced with top electrode material. Some embodiments include memory arrays that contain a second series of electrically conductive lines crossing a first series of electrically conductive lines. Memory cells are at locations where the electrically conductive lines of the second series overlap the electrically conductive lines of the first series. First and second memory cell materials are within the memory cell locations. The first memory cell material is configured as planar sheets and the second memory cell material is configured as upwardly-opening containers.