Graphics processing unit buffer management
US9256915B2 · kind B2 · utility
1Cited by
5References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2013 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Jan 9, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/121
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The techniques are generally related to management of buffers with a management unit that resides within an integrated circuit that includes a graphics processing unit (GPU). The management unit may ensure proper access to the buffers by the programmable compute units of the GPU to allow the GPU to execute kernels on the programmable compute units in a pipeline fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.