Strobe acquisition and tracking
US9257163B2 · kind B2 · utility
6Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2013 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | Apr 18, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command in accordance with a determination that a time interval since a last read command issued by the memory controller exceeds a predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.