Semiconductor structure with self-aligned wells and multiple channel materials
US9257557B2 · kind B2 · utility
0Cited by
2References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 20, 2014 |
| Grant date | Feb 9, 2016 |
| Priority date | — |
| Expiry date | May 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a semiconductor structure having a strain relaxed buffer, and method of fabrication. A strain relaxed buffer is disposed on a semiconductor substrate. A silicon region and silicon germanium region are disposed adjacent to each other on the strain relaxed buffer. An additional region of silicon or silicon germanium provides quantum well isolation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.