Inventor · Latham, NY, US

David Paul Brunco

30Patents
5h-index
44Co-inventors
65Inventor score

Filing activity: Jan 30, 2004 → Nov 29, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US6869892B1 Method of oxidizing work pieces and oxidation system Electricity 16 Expired
US8828839B2 Methods for fabricating electrically-isolated finFET semiconductor devices Emerging Cross-Sectional Technologies 13 Active
US7517765B2 Method for forming germanides and devices obtained thereof Electricity 7 Active
US10014409B1 Method and structure to provide integrated long channel vertical FinFET device Electricity 7 Active
US9006705B2 Device with strained layer for quantum well confinement and method for manufacturing thereof Electricity 5 Active
US9299809B2 Methods of forming fins for a FinFET device wherein the fins have a high germanium content Electricity 5 Active
US9583557B2 Integrated circuits including a MIMCAP device and methods of forming the same for long and controllable reliability lifetime Electricity 5 Active
US10002793B1 Sub-fin doping method Electricity 4 Active
US10347541B1 Active gate contacts and method of fabrication thereof Electricity 4 Active
US9029217B1 Band engineered semiconductor device and method for manufacturing thereof Electricity 4 Active
US9911740B2 Method, apparatus, and system having super steep retrograde well with engineered dopant profiles Electricity 3 Active
US8207030B2 Method for producing nMOS and pMOS devices in CMOS processing Electricity 3 Active
US9929159B2 Method, apparatus, and system having super steep retrograde well with silicon and silicon germanium fins Electricity 2 Active
US8963225B2 Band engineered semiconductor device and method for manufacturing thereof Electricity 1 Active
US10403742B2 Field-effect transistors with fins formed by a damascene-like process Electricity 1 Active
US10811422B2 Semiconductor recess to epitaxial regions and related integrated circuit structure Electricity 1 Active
US10062612B2 Method and system for constructing FINFET devices having a super steep retrograde well Electricity 0 Active
US9953872B2 Semiconductor structure with self-aligned wells and multiple channel materials Electricity 0 Active
US10325811B2 Field-effect transistors with fins having independently-dimensioned sections Electricity 0 Active
US8828826B2 Method for manufacturing a transistor device comprising a germanium based channel layer Electricity 0 Active
US9490123B2 Methods of forming strained epitaxial semiconductor material(S) above a strain-relaxed buffer layer Electricity 0 Active
US8354344B2 Methods for forming metal-germanide layers and devices obtained thereby Electricity 0 Active
US10727067B2 Late gate cut using selective conductor deposition Electricity 0 Active
US9257557B2 Semiconductor structure with self-aligned wells and multiple channel materials Electricity 0 Active
US9793168B2 Semiconductor structure with self-aligned wells and multiple channel materials Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.