MOS-transistor with separated electrodes arranged in a trench
US9263552B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 5, 2014 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Jun 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
Abstract
A MOS transistor is produced by forming a first trench in a semiconductor body, forming a first isolation layer on inner surfaces of the first trench, and filling the first trench with conductive material to form a first electrode within the first trench. A portion of the first electrode is removed along one side wall of the first trench to form a cavity located within the first trench. A second isolation layer is formed on inner surfaces of the cavity, and the cavity is at least partially filled with conductive material to form a second electrode within the cavity. A structured third isolation layer is formed on a top surface of the semiconductor body, and a metallization layer is formed on the structured third isolation layer. The first or the second electrode is electrically and thermally connected to the metallization layer via openings in the structured third isolation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.