Antonio Vellei
23Patents
2h-index
30Co-inventors
53Inventor score
Filing activity: Sep 13, 2013 → Feb 21, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10615272B2 | Method for producing IGBT with dV/dt controllability | Electricity | 3 | Active |
| US9076838B2 | Insulated gate bipolar transistor with mesa sections between cell trench structures and method of manufacturing | Electricity | 3 | Active |
| US10978418B2 | Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer | Electricity | 1 | Active |
| US10840362B2 | IGBT with dV/dt controllability | Electricity | 1 | Active |
| US10854739B2 | Method for producing IGBT with dV/dt controllability | Electricity | 1 | Active |
| US11581428B2 | IGBT with dV/dt controllability | Electricity | 1 | Active |
| US10224206B2 | Bipolar transistor device with an emitter having two types of emitter regions | Electricity | 1 | Active |
| US9553179B2 | Semiconductor device and insulated gate bipolar transistor with barrier structure | Electricity | 1 | Active |
| US10461056B2 | Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact | Electricity | 1 | Active |
| US9263552B2 | MOS-transistor with separated electrodes arranged in a trench | Electricity | 1 | Active |
| US10910487B2 | Power semiconductor device having trench electrodes biased at three different electrical potentials, and method of manufacturing the same | Electricity | 0 | Active |
| US12034066B2 | Power semiconductor device having a barrier region | Electricity | 0 | Active |
| US9647100B2 | Semiconductor device with auxiliary structure including deep level dopants | Electricity | 0 | Active |
| US12033972B2 | Chip package, method of forming a chip package and method of forming an electrical contact | Electricity | 0 | Active |
| US10439055B2 | IGBT with dV/dt controllability | Electricity | 0 | Active |
| US11469317B2 | RC IGBT | Electricity | 0 | Active |
| US9653568B2 | Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures | Electricity | 0 | Active |
| US11594621B2 | Method of processing a power semiconductor device | Electricity | 0 | Active |
| US10347754B2 | Power semiconductor device with dV/dt controllability through select trench electrode biasing, and method of manufacturing the same | Electricity | 0 | Active |
| US10930772B2 | IGBT having a barrier region | Electricity | 0 | Active |
| US9741571B2 | Bipolar transistor device with an emitter having two types of emitter regions | Electricity | 0 | Active |
| US10608104B2 | Trench transistor device | Electricity | 0 | Active |
| US9899504B2 | Power semiconductor transistor having increased bipolar amplification | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.