Methods for forming interconnect structure utilizing selective protection process for hardmask removal process
US9269563B2 · kind B2 · utility
6Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2014 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Jun 6, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses for forming a dual damascene structure utilizing a selective protection process to protect vias and/or trenches in the dual damascene structure while removing a hardmask layer from the dual damascene structure. In one embodiment, a method for removing a patterned hardmask layer from a substrate includes forming an organic polymer material on a dual damascene structure that exposes substantially a patterned hardmask layer disposed on an upper surface of the dual damascene structure, removing the patterned hardmask layer on the substrate, and removing the organic polymer material from the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.