Semiconductor die assemblies with enhanced thermal management and semiconductor devices including same
US9269646B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2012 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Jul 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die assembly comprises a plurality of semiconductor dice in a stack. Another semiconductor die is adjacent to the stack and has a region, which may comprise a relatively higher power density region, extends peripherally beyond the stack. Conductive elements extend between and electrically interconnect integrated circuits of semiconductor dice in the stack and of the other semiconductor die. Thermal pillars are interposed between semiconductor dice of the stack, and a heat dissipation structure, such as a lid, is in contact with an uppermost die of the stack and the higher power density region of the other semiconductor die. Other die assemblies, semiconductor devices and methods of managing heat transfer within a semiconductor die assembly are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.