Interposer with overmolded vias
US9269659B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2015 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Jan 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interposer for a packaged semiconductor device is formed by applying an encapsulant to (e.g., by overmolding or applying lamination of tapes to) a perforated metal foil having vertical metal tabs that form the vertical metal vias in the interposer. A solid metal foil can be stamped using a micro-stamping tool to form the perforated foil and vertical tabs. Bump pads and/or re-distribution layer (RDL) traces are formed (e.g., using wafer fabrication processes or by applying flexible tape RDL layers) on the top and back sides of the foil to complete the manufacturing process. Such interposers can be cheaper to manufacture than conventional interposers having silicon or glass substrates with through-silicon vias (TSVs) formed using wafer fabrication processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.