Methods of forming group III-V semiconductor materials on group IV substrates and the resulting substrate structures
US9275861B2 · kind B2 · utility
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43References
10Claims
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Key dates
| Filing date | Jun 26, 2013 |
| Grant date | Mar 1, 2016 |
| Priority date | — |
| Expiry date | Jan 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One method disclosed herein includes forming a patterned mask layer above a surface of a semiconductor substrate, performing at least one etching process through the patterned mask layer to define a plurality of intersecting ridges that define a ridged surface in the substrate, and forming a Group III-V material on the ridged surface of the substrate. An illustrative device disclosed herein includes a Group IV substrate having a ridged surface comprised of a plurality of intersecting ridges and a Group III-V material layer positioned on the ridged surface of the Group IV substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.